Study of the advanced bonding layout of stack chip assembly

by Tseng, Jen-Te

Abstract (Summary)
Modern development of electronic devices requires the integration of more and more powerful functions within the same amount of space. However, this is accompanied by increased difficulties within the manufacturing and packaging processes. A proposal for the arrangement of wire connecting is suggested. In this work, which is to replace the multi-tier design with conventional high & long wire bonding. The advance of bonding layout of the stack die HSBGA (Heat Slug Ball Grid Array) chip assembly can enhance wire bonding with electrical performance by shortening wire length. This promises a better thermal performance of thermal consumption between the function die and heat slugs. This analysis includes simulations of electrical and thermal performance, as well as simulations of drawing layout for an actual production, the bonding looping parameters optimization, and SEM analysis to confirm the results. Based on the above analyses, the results reveal three advantages of the proposal of ¡§Advance bonding layout of chip assembly¡¨ which are: (1)reduction of 40% thermal resistance, (2)£cJC voltage insertion loss improvement of 30~40%, and (3)reduction of the gold wire length from 4.5mm to 3mm, saving 1/3 of gold wire consumption. Overall, assembly costs can be reduced by 6%.
Bibliographical Information:

Advisor:none; none; none

School:National Sun Yat-Sen University

School Location:China - Taiwan

Source Type:Master's Thesis

Keywords:bonding layout chip assembly


Date of Publication:02/07/2007

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