Silencer! : a tool for substrate noise coupling analysis

by Birrer, Patrick

Abstract (Summary)
This thesis presents Silencer!, a fully automated, schematic-driven tool for

substrate noise coupling simulation and analysis. It has been integrated in the

CADENCE DFII environment and seamlessly enables substrate coupling analysis

in a standard mixed-signal design flow. Silencer! aids IC designers in the analysis

of substrate noise coupling at different levels of hierarchy - from a level where only

an approximate layout of the transistors is known to a level that incorporates

various parasitic elements. It can be used for layout optimization to reduce

substrate cross-talk noise between circuitry that injects noise into the substrate and

other circuitry that is sensitive to it. Examples in a TSMC 0.35?m heavily doped

process have been simulated and the results are in good agreement with measured

fabricated chips.

Bibliographical Information:

Advisor:Mayaram, Kartikeya; Fiez, Terri S.

School:Oregon State University

School Location:USA - Oregon

Source Type:Master's Thesis

Keywords:substrate noise mixed signal circuits


Date of Publication:01/09/2003

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