Projeto de um circuito divisor de freqüência de ultra-baixo consumo de potência

by Giusti, Gustavo Buchweitz

Abstract (Summary)
This dissertation presents the design of a Prescaler Dual-Modulus (PDM) circuit, designed for TSMC 0.18um technology, whose main interest is ultra-low power consumption. Two proposals for PDM?s will be presented, one with the objective of obtaining ultra-low power consumption, and the other one with the aim of obtaining a higher maximum frequency, however without compromising the low power consumption. PDM circuits have a potencially wide use in PLL circuits, which demands appliance in high frequencies. The operation of the transistors is weak inversion. Operating in this regimen, they become very susceptible to any variations in the technological parameters, both intrachip and interchip. A solution, a study of three topologies of compensating circuits was carried out, and a fourth topology was proposed. This proposed topology aims at expanding the range of voltage supported by the transistors without a risk of damaging them. The compensation will be carried out through the technique of bulk bias of the transistors, in such a way the bias voltage can correct any variation in Vt, Vdd or even the temperature. Circuits simulators were used to obtain the results, and they were found to be very satisfactory.
This document abstract is also available in Portuguese.
Bibliographical Information:

Advisor:Carlos Galup Montoro; Márcio Cherem Schneider; José Luís Almada Guntzel; Luis Cléber Carneiro Marques

School:Universidade Federal de Santa Catarina

School Location:Brazil

Source Type:Master's Thesis

Keywords:energia consumo circuitos integrados engenharia elétrica eletrica


Date of Publication:09/28/2007

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