A New Non-Quasi Static Mosfet Model
Recent progress in wireless communication is sustained through integrated circuit technologies that offer a low cost and low power devices that operate in the Radio Frequency (RF) range with relatively low noise figure. The submicrometer CMOS technology presents a serious alternative to the more expensive, high power GaAs and Si bipolar technologies that have been used for the design of high frequency ICs. Design testing and verification through circuit simulation is a critical step in the design cycle of RF integrated circuits (RFICs). Accurate device models are therefore required to reduce design cycles and to achieve success when the circuit is finally committed to silicon.
This thesis addresses the Radio Frequency (RF) small-signal and large-signal models for the MOS transistor. The quasi-static (QS) and non-quasi-static (NQS) models are discussed and the assumptions used in their development are examined. The various charge components are briefly introduced and the source/drain charge partitioning is presented. The limitation of the QS approach at high frequency is investigated using the Bsim3v3.1 model. The development of a first order NQS small-signal model is briefly presented and its suitability for RF applications is indicated. The effect of the distributed gate, channel, and substrate resistances on the high frequency characteristics of the MOS transistor is examined. We propose a Radio Frequency small-signal equivalent circuit (EC) together with an efficient parameter extraction algorithm that is necessary for the device optimization and the development of accurate large-signal models. The validity of the proposed model and the accuracy of the extraction method are verified by comparing Pspice simulation results of the EC to experimental data and the Bsim3v3.1 model up to 10GHz.
Advisor:Mahmoud El Nokali; Dietrich W. Langer; Hong Koo Kim
School:University of Pittsburgh
School Location:USA - Pennsylvania
Source Type:Master's Thesis
Date of Publication:01/28/2005