Multi-modulus divider in fractional-N frequency synthesizer for direct conversion DVB-H receiver
Abstract (Summary)Digital broadcast to mobile phones, or Mobile TV, is believed to be the future of broadcast. Among various international mobile TV standards, DVB-H emerges as the prospective global standard. A Fractional-N Delta-Sigma frequency synthesizer is introduced for dual-band(European UHF band and USA L-band) direct-conversion DVB-H receiver. A 5-bit MOS Current-mode Logic (MCML) Multi-modulus Divider with division ratio of 32 to 63 is designed for the frequency synthesizer. The circuit is capable of operating from 1.6 to 2.5 GHz with less than 0.1 % frequency division error, -145 dBc/Hz phase noise contribution, and 23.3 mW power consumption in TSMC 0.18 um CMOS process. A comparison in performance with existing designs is also presented.
School:The Ohio State University
School Location:USA - Ohio
Source Type:Master's Thesis
Date of Publication:01/01/2007