Low-power video decoding with dynamic voltage scaling

by Dixit, Reshma

Abstract (Summary)
This thesis investigates Dynamic Voltage Scaling (DVS) techniques to lower

power consumption in video decoding. A DVS scheme called the Frame-data

Computation Aware (FDCA) method has been presented. This method is

adaptable not only to stored video applications but also to real-time video

scenarios. Unlike DVS schemes for video decoding proposed earlier, the FDCA

scheme does not require any preprocessing mechanisms. Results from simulations

performed using the scheme are presented and compared with prior existing DVS

schemes. The results indicate that the FDCA method provides power saving of up

to an average of about 68%.

Bibliographical Information:

Advisor:Lee, Ben

School:Oregon State University

School Location:USA - Oregon

Source Type:Master's Thesis

Keywords:electric power conservation image processing digital techniques voltage regulators video compression


Date of Publication:04/08/2004

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