Integrated Circuit Interface for SAW Biosensors Applications
Chapter 4: SAW Sensor Interface Circuit Design 58
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Figure 4- 23 Heater voltage vs. Control voltage
The final step is to convert the calculated control voltage into an analogue
voltage feeding the transistor gate. This is done by the XFAB (adacc01) Digital to
Analogue Converter (Appendix A.3.7). The process is repeated until the temperature
difference reaches its minimum which means that the required temperature is
achieved within the allowed resolution. The control logic is implemented in VHDL
description language. The VHDL code with explanation comments is included in
The ADC and DAC cells use the arcoc03 10 kHz clock cell as a clock. The
conversion is done in less than 20 clock cycles. A slower clock is needed to clock the
whole system. To allow a sufficient time for the heater to change its temperature; ten
seconds period was set as a main period (100m Hz clock frequency). This clock is
generated using the arcoc03 clock cell and a digital divider by 100,000 implemented
in VHDL (appendix B.4). The system asynchronous reset is done using XFAB
aporc02 cell (Appendix A.3.5). The cell generates a reset (output high) five microseconds
after the powering on instant. The signal goes low until another power on
Chapter 4: SAW Sensor Interface Circuit Design 59
The circuit was laid out using Cadence Virtuoso layout tools.
4.6.1 Oscillator layout
Figure 4- 24 Current source inverting amplifier layout
As stated in section 4.2, each oscillator consists of an amplifier, a filter and the SAW
resonator. The oscillator output is buffered via a buffer amplifier and amplified in
two stages each through a CMOS inverter. The current source inverting amplifier is
Chapter 4: SAW Sensor Interface Circuit Design 60
composed of a biased PMOS and the input feeding the NMOS. The PMOS width
and length are 21µm and 0.6µm, respectively. The NMOS aspect ratio is (120µm/
Figure 4- 25 Buffer amplifier layout
To improve the layout efficiency a four-gate NMOS each of 30µm was chosen
with all gates tied together. The amplifier layout is shown in figure 4.24. A similar
approach was applied to the buffer layout where the PMOS and NMOS widths are
60 and 120 µm respectively. The buffer layout is illustrated in figure 4-25.
The by-pass capacitors used in the oscillator to block the DC signals were
chosen as poly capacitors with a value of 3pF and their dimensions are 30µm×53µm.
The full layout of the oscillator is shown in figure 4-26.
Chapter 4: SAW Sensor Interface Circuit Design 61
Figure 4- 26 Layout of the oscillator
4.6.2 Mixer Layout
Figure 4- 27 Mixer layout
Chapter 4: SAW Sensor Interface Circuit Design 62
The mixer is composed of an NMOS to have the LO (Local Oscillator) input with
30µm/1.5µm dimensions and a PMOS for RF (Radio Frequency) input with
60µm/0.6µm dimensions followed by an RC low pass filter. The resistance value is
12kΩ as shown in figure 4-12. The length and width are 36µm and 2µm,
respectively. The capacitor was chosen to be 50µm×50µm in order to have a 4.7pF
capacitance to reach the required filter cut-off frequency (figure 4-12). The mixer
layout is shown in figure 4-27.
4.6.3 Sine to square converter Layout
The converter of the mixer signal constitutes a comparator with by-pass capacitors.
The by-pass capacitor should have a considerably large value due to the frequency
translation of the signal to the order of several MHz. The capacitor’s dimensions are
100µm×100µm in order to provide 18.76pF capacitance. The sine-to-square
converter layout is shown in figure 4-28. The low-pass filter dimensions are set as
the mixer’s filter dimensions.
Figure 4- 28 Sine-to-square wave converter layout
Chapter 4: SAW Sensor Interface Circuit Design 63
4.6.4 Analogue layout
After adding the analogue cells for biasing the oscillators and the comparator cell;
the whole analogue part layout is shown in figure 4-29.
The circuit has six Input-Output IO pins; four for the two SAW devices and
ground and VDD rails.
Figure 4- 29 Layout of the analogue circuit
4.6.5 Digital layout
The digital circuit used as a clock divider layout is shown in figure 4-30. Its size is
210µm×150µm. The digital counter used for digital output is illustrated in figure 4-
Chapter 4: SAW Sensor Interface Circuit Design 64
Figure 4- 30 Clock divider layout
Figure 4- 31 Digital counter layout
Chapter 4: SAW Sensor Interface Circuit Design 65
4.6.6 Chip layout
The full chip dimensions are 2.5mm×1.8mm. Figure 4-32 shows the full chip layout.
The analogue circuit is 1mm×0.6mm while the digital counterpart is 0.3mm×0.6mm.
Analogue supply is shown at the bottom while the digital supply is at the right side
of the chip. The sixteen digital outputs are shown at the chip top with the most
significant output to the left. The SAW resonators connections are placed at the left
with additional ground pins to allow connecting the resonators ground pins.
Figure 4- 32 Full chip layout
In this chapter, the system design and block diagram were demonstrated. The SAW
resonator model was analysed and the model parameters were calculated. The
oscillator circuit specifications were presented and the values of each component
were computed. The mixer analysis was given and the mixer sinusoidal output
conversion a square shape was described.
Temperature effect on the SAW behaviour was briefly described. The
temperature control circuit was implemented. Experimental measurements were
carried out to estimate the heater TCR and the relationship between heating power
Chapter 4: SAW Sensor Interface Circuit Design 66
and temperature. Control logic was designed to achieve automatic temperature
control. The analogue and digital parts of the circuit were laid out. The full chip
layout was shown.
1. Allen, P.E., Holberg, D.R., 2002. CMOS Analog Integrated Circuits. Oxford
University Press, Oxford, pp. 167-232.
2. Barwinski, B., 1990. Temperature coefficient of resistance in discontinuous
gold films on sapphire substrate near percolation threshold, Surface Science,
Vol. 231, Issues 1-2, Proceedings of the Thirteenth International Seminar on
Surface Physics Piechowice, Poland, pp. 165-167.
3. Chaize, A., 2008. SAW micro-sensor design for biosynthetic infochemical
communication. MSc thesis (Advisor Cole, M.). University of Neuchatel,
Switzerland, University of Warwick, UK.
4. Gardner, J.W., Varadan, V.K., Awadelkarim, O.O., 2001. Microsensors,
MEMS and Smart Devices. John Wiley and Sons, Sussex, UK, ch. 9-11, pp.
5. Liu, L., Wang, Z., 2006. Analysis and Design of a low-voltage RF CMOS
Mixer. IEEE Transactions on Circuits and Systems, vol.53, no.3, pp. 212-
6. Nayak, M.M., Srinivasulu, S., Rajanna, K., Mohan, S., Muthunayagam, A.
E., 1993. Electrical and strain-sensitive behaviour of sputtered gold films.
Springer, Netherlands, Journal of Materials Science Letters, vol. 12, pp. 119-
7. Nordin, A., Zaghloul, M., 2006. Design and Implementation of 1GHz CMOS
resonator utilizing Surface Acoustic Wave, IEEE International Symposium
on Circuits and Systems ISCAS06. Island of Kos, Greece, pp. 3514-3517.
8. Shibata, y., Kuze, N., Matsui, M., Kanno, Y., Kaya, K., Ozaki, M., Kanai,
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Chapter 5: Simulation results of the SAW interfacing circuit 67
Simulation results of the SAW interfacing
This chapter reports the simulation results of the SAW interfacing circuit. The
analogue and digital circuits were simulated in Cadence Virtuoso simulator and the
temperature control circuit was simulated in ALDEC Active-HDL tools. The
transient and AC responses of both the oscillator and the mixer are presented. The
signal conversion to a digital output is shown. The power consumption calculation is
given. Lastly, the temperature control circuit simulation is shown.
The oscillator is the first stage of the signal conditioning circuit. In order to obtain an
output suitable for further processing; the oscillator output voltage should be able to
drive the mixer.
As shown in Chaize (2008) the SAW resonator resonant frequency is 228.79
MHz, so the oscillation period is around 4 ns. To ensure oscillation start; an initial
time of 10µs was set. In order for the simulator to detect an accurate oscillation; a
step size of less than a twentieth of the oscillation period should be set, so the
maximum step size was set to (4ns/20) = 200ps.