# Integrated Circuit Interface for SAW Biosensors Applications

Chapter 4: SAW Sensor Interface Circuit Design 38

In order to calculate the IDT capacitance, equation 3.3 is used. Substituting the

dielectric constant of lithium tantalate ε_{p}= 50 and the parameters from the table

퐶_{� }= 휀_{� }× 휀_{� }× 푊 × 푁_{� }= 50 × 8.85 × 10^{��� }× 1440 × 10^{�� }× 2.5 = 1.58 푝퐹

eq.4.2

The electromechanical coupling coefficient K^{2 }of the lithium tantalate SAWs is

between 0.01 and 0.05 (Shibata et al., 1995). So taking K^{2}=0.03 is a reasonable

approximation.

Substituting from table 4.1 into equation 3.6 to calculate the radiation

conductance

퐺_{� }= 8푘^{�}푓

�^{퐶}

�^{푁}

�

�

= 8 × 0.3 × 228.79 × 10

�

× 1.58 × 10

���

× 2.5

�

≅ 0.544 푚퐴/푉

eq.4.3

Equation 3.5 is used to calculate the effective conductance. There is no

information given regarding the array reflectivity Г which is kept as small as

possible. Accordingly, its effect will be very small.

The motional resistance will be calculated as shown in equation 3.4

푅

� ^{≅ }^{�}

�_{�}

= ^{� }=

�_{�}

�

�.���×��^{��}

≅ 1.8푘Ω eq.4.4

The effect of array reflectivity will reduce the motional resistance by a small

factor so it will be set to

푅_{� }= 1.75푘Ω

Re-writing equation 3.2 as follows_{푄 }_{= }�� �_{� }�_{�}

�_{�}

=

�

���_{� }�_{� }�_{�}

eq.4.5

The quality factor Q of the SAW resonator is around 100, substituting in

equation 4.5 yields

퐶

� ^{=}

�

�× �_{�}×���_{�}

=

The motional inductance is given by:

�

���×�.��×����×�×�.��×���.��×��^{�}

≅ 4푓퐹 eq.4.6

퐿_{� }=

�

��×�_{�}×�_{�}

=

�×�.��×��.��×��^{�}×�×��

�

���

≅ 121.1 휇퐻 eq.4.7

The calculated SAW resonator circuit model is shown in figure 4-4

Chapter 4: SAW Sensor Interface Circuit Design 39

Figure 4- 4 model Calculated SAW resonator circuit

The frequency and phase response of the SAW resonator model was simulated

using Cadence Virtuoso Spectre simulator. The result is shown in figure 4-5.

Figure 4- 5 SAW model simulated gain and phase response

It can be seen that the dB loss of the SAW is about 12 dB and the two ports

encounter 180^{0 }phase shift.

Using equation 4.1 gives:

휃

���� ���� ^{= }^{휙}_{��� }− 180° = −360° eq. 4.8

The amplifier phase shift caused by the components parasitic capacitances and

should be 180^{0}.

Chapter 4: SAW Sensor Interface Circuit Design 40

The required amplifier gain is at least 20dB to guarantee the start of oscillation.

So a minimum gain ratio of at least 10 must be introduced at the resonator frequency.

As discussed by Allen et al. (2002), current source inverting amplifiers have

superior gain to their active load counterparts. Push-pull CMOS inverters have

higher large-signal gains than their inverting amplifier counterparts. The main

disadvantage of a push-pull inverter is its DC stability. Since the oscillator is based

on small-signal amplification (noise or switching signal), current source amplifier

topology is used in the oscillator design.

The single stage inverting amplifier schematic is shown in figure 4-6.

V_{dd}

M_{P}

V_{b}

V_{in}

M_{N}

Figure 4- 6 Current source inverter amplifier

Source: Allen, P.E., Holberg, D.R., 2002. CMOS Analog Integrated Circuits, Oxford University

Press, Oxford, pp. 172.

An additional transistor M_{b }is used for biasing the NMOS (figure 4-7) and

keeps the gate and drain with the same DC voltage to maintain M_{N }in saturation

using a very low aspect ratio (Nordin et al., 2006). The chosen (W/L)_{p }=

(0.8µm/60µm).

A by-pass capacitor C_{bp }is inserted to AC couple the signal to the input gate of

the NMOS. For the operation frequency around 229MHz, the AC impedance

introduced by the by-pass capacitor is calculated as

푋

� ^{=}

�

��×^{(}������^{)}×�_{��}^{(}��^{)}

eq. 4.9

X_{c }is the impedance introduced by the by-pass capacitance.

From equation 4.9, it is clear that a capacitance in the range of 3pF will

provide negligible AC impedance at the working frequency.

Chapter 4: SAW Sensor Interface Circuit Design 41

Figure 4- 7 Complete current inverter amplifier schematics

So the amplifier complete schematics is shown in figure 4-7

The amplifier parameters are calculated as below (Allen et al., 2002):

All n and p subscripts denote NMOS and PMOS transistors respectively.

Maximum Voltage Gain for NMOS:

퐴_{��� }=

g_{m }is the trans-conductance

�_{��}

(�_{���}� �_{���})

= �^{��}^{��}^{�}^{�}

�_{�}�_{�}

�

�

� �

�

�_{�}� �_{�}

� 훼 1/_{�}퐼_{� }eq. 4.10

g_{ds }is the drain- source conductance calculated as: g_{ds}= λ I_{D}

K_{p }is the gain factor

λ is the velocity saturation

I_{D }is the drain current

W and L are the transistor width and the length, respectively

The amplifier transfer function:

퐴^{(}휔^{) }=

��_{���}

(�� ^{������ })

�_{���}� �_{���}

eq.4.11

C_{out }is the output capacitance and ω is the angular frequency.

Chapter 4: SAW Sensor Interface Circuit Design 42

The 3dB angular frequency:

휔_{��� }= ^{(}^{�}^{���}^{� �}^{���}^{)}

�_{���}

eq.4.12

So the 3dB frequency is:_{f}_{��� }_{= }(�_{��� }� �_{���})

(� � �_{���}) ^{= }^{(}^{�}^{�}^{� �}^{�}^{) }^{�}^{�}

(� � �_{���})

eq.4.13

It can be seen from equation 4.10 that gain is inversely proportional to the DC

current and from equation 4.13 that the bandwidth is proportional to the DC current.

The current is calculated as follows:

퐼_{� }= ^{�}

� ^{�}^{�}_{� }� 퐾_{��}^{�}푉_{�� }− 푉_{�� }− ^{�}푉_{��}^{��}

�^{�}(1 + 휆_{�}푉_{���}) eq.4.14

V_{b1 }is the biasing voltage and V_{t }is the transistor threshold voltage

To ensure the PMOS works in saturation mode the following condition must

be met:

V_{DS }- (V_{dd }– V_{b1 }– V_{tp}) ≥ 0.3 V

Referring to appendix A.2.1 for MOS parameters, and substituting V_{DSp }= V_{dd }-V_{out}

V_{out }≤ V_{b}1 + 1.4

Choosing a low biasing voltage for the PMOS increases its source-to-gate

voltage. Consequently the drain current increases, so the static power consumption

increases. Exploring the available analogue cells in the XFAB XC06 process, it can

be seen that choosing a band gap cell (abgpc01) with an output of 2.6444V

(appendix A.3.1) is a convenient choice to have a reasonable bandwidth and avoid

high power consumption. The band-gap cell output voltage typical temperature

coefficient is 50ppm which increases the biasing voltage by 4mV when temperature

increases by 30°C.

From equation 4.11, it can be seen that the bandwidth is inversely proportional

to C_{out}.

Since the amplifier will be used in the oscillator closed loop, the gate-source

capacitance C_{gs }will be the output capacitance of the preceding stage C_{out}.

For a transistor working in saturation C_{gs }= 2/3 WL C_{ox}

C_{ox }is the oxide capacitance per unit area

Chapter 4: SAW Sensor Interface Circuit Design 43

Choosing the amplifier NMOS transistor dimensions should be taken carefully.

The length is taken equal to the minimum process dimension (0.6 µm). Increasing

width will increase gain but also decrease bandwidth so choosing W_{n }= 120 µm will

give a reasonable gain.

Using appendix A.2.1, and substituting in equation 4.10 yields

퐴_{��� }=

��.����� _{�}(��)

�^{�}_{�}

Choosing I_{D }with a value of 2mA will degrade the maximum gain and increase

the power consumption. Decreasing the drain current below 1mA limits the amplifier

bandwidth to the order of tens of MHz, so I_{D }will be set arbitrarily to 1.2mA.

퐴_{��� }≅

��.����� _{�}(��)

�^{�}_{�}

≅ ^{��}^{.}^{�����}_{√�}_{.}_{� }≅ 22 eq. 4.15

This gain will be degraded according to the bandwidth limitation, moreover,

there will be also loading effect due to the non-ideal AC coupling at the amplifier

input, so one stage of amplification will not be sufficient for starting oscillation.

Substituting I_{D }= 1.2mA into equation 4.14 yields:

(^{�}_{� })_{� }=

�

�

�.�

×�.���×^{(}���.������.�^{)}^{�}

≅ 38 eq. 4.16

Taking L_{p }equals to the minimum process dimension 0.6 µm, so

W_{p}= 38 × 0.6 =22 µm

So the PMOS width and length will be set W_{p }and L_{p }will be 21µm and 0.6µm,

respectively.

So calculating the drain current using equation 4.14 taking the chosen

dimensions into considerations results in:

퐼_{� }= ^{�}

� ^{�}^{�}_{� }� 퐾_{��}^{�}푉_{�� }− 푉_{�� }− ^{�}푉_{��}^{��}

�^{�}^{�}1 + 휆_{�}푉_{���}^{� }≅ ^{� }× �^{�� }� × 0.040 ×

� �.�

(5 − 2.6444 − 1.1)^{� }≅ 1.1 푚퐴 eq. 4.17

Calculating 3-dB bandwidth using equation 4.13_{f}_{��� }_{= }(�_{��� }� �_{���})

(� � �_{���}) ^{= }^{(}^{�}^{�}^{� �}^{�}^{) }^{�}^{�}

(� � (����)

≅

(_{�}_{.}_{��������}_{.}_{������})_{∗�}_{.}_{�}

�×�.��×^{�}_{�}×�.��×��^{��}×���×�.�)

≅ 95MHz

eq. 4.18

The designed amplifier transfer function was simulated using Cadence

Virtuoso Spectre simulator. The result is shown in figure 4-8.

Chapter 4: SAW Sensor Interface Circuit Design 44

Figure 4- 8 Amplifier transfer function

The open loop phase shift is shown below

∅ = −180° − 180°− < 푆퐴푊 − 휃_{� }− 휃_{� }eq. 4.19

θ_{1 }and θ_{2 }are the phase shifts of the first and second amplifier stages,

respectively.

The SAW resonator phase shift changes around the series resonance frequency,

so along with θ_{1 }and θ_{2 }due to parasitic capacitances and resistances, a total of (-360

º) can be obtained.

휃 = arctan ( ^{� }) eq. 4.20

�_{���}

A buffer amplifier is required to extract the output signal for further

processing.

The buffer amplifier is composed of a CMOS amplifier with a biased PMOS

and the input feeds the NMOS (Nordin et al., 2006). The NMOS (W/L) ratio is set to

a high aspect ratio (120µm/0.6µm) to permit a good amplification. The PMOS aspect

Chapter 4: SAW Sensor Interface Circuit Design 45

ratio is set to (60µm/3µm) to allow the oscillator to have a DC signal output which

will be used to bias the mixer later. The buffer schematic diagram is shown in figure

4-9.

^{V }dd

^{V }bias _{V }_{in}

Figure 4- 9 Buffer schematic diagram

The complete oscillator block diagram is shown in figure 4-10.

Output

Amplifier 1 Amplifier 2 Buffer

SAW resonator

Figure 4- 10 Oscillator block diagram

The oscillator frequency is not exactly the resonant frequency of the SAW

resonator; the parallel SAW IDT and parasitic capacitances of the amplifier and the

low pass filter add a slight parallel capacitance to the motional capacitance. So the

oscillator frequency will be slightly lower than that of the resonator. The parasitic

capacitance is fixed and very small compared to the motional capacitance.

The oscillator frequency f_{osc }is calculated as follows:

푓

��� ^{=}

�

��_{�}�_{� }�_{�}

=

�

�� _{�}�_{� }(�_{�}��_{����})

eq. 4.21

L_{m }and C_{m }are the motional inductance and capacitance, respectively.

C_{t }is the total effective capacitance.

Chapter 4: SAW Sensor Interface Circuit Design 46

C_{par }is the total parallel capacitance.

Re-writing equation 4.21 gives

푓

��� ^{= 1}

2π _{�}L_{� }(C_{� }+ C_{���}) ^{= 1}

2π _{�}L_{�}C_{�}

( ^{1}_{�}1 + (C_{���}/C_{�})^{)}

푓

��� ^{=}

�

�� _{�}�_{�}�_{�}

^{�}1 + (C_{���}/C_{�})^{�}^{��}^{/}^{� }eq. 4.22

For C_{par }<< C_{m }equation 4.22 can be reduced to:

푓

��� ^{=}

�

�� _{�}�_{�}�_{�}^{�}1 + (C_{���}/C_{�})^{�}^{��}^{/}^{� }= ^{�}

�� _{�}�_{�}�_{�}

�

(1 −

�

�_{���}

× )

�_{�}

푓_{��� }= 푓_{�}(1 − 0.5 ^{�}^{���}) eq.4.23

�_{�}

f_{m }is the SAW resonator motional (series) resonance frequency = ^{�}

�� _{�}�_{�}�_{�}

4.3 Mixer

The mixer is essential to the design because the high frequency operation makes the

absolute frequency measurement inaccurate. In our application the difference

frequency is only interesting without paying attention to the signal amplitude so an

unbalanced mixer will be used. The square-law mixer schematic is shown in figure

4-11 (Liu et al., 2006).

Vdd

Sensing oscillator _{Output}

Reference Oscillator

Figure 4- 11 Square law mixer

Source: Liu, L., Wang, Z. 2006. Analysis and Design of a low-voltage RF CMOS Mixer, IEEE

Transactions on Circuits and Systems, vol. 53, no. 3, pp. 212-216

Chapter 4: SAW Sensor Interface Circuit Design 47

The oscillator output has a DC voltage level, so instead of filtering the

oscillator DC signal; the DC level will be used to bias both transistors.

The voltage output can be written as in Liu et al. (2006) and replacing the local

oscillator signal v_{LO }by v_{sens }and RF signal v_{RF }by v_{ref }:

푣_{��� }= 푉

�� ^{−}

�_{� }µ_{n }�^{�}_{� }�_{�}^{(}�_{�� }� �_{����}��_{�� }^{)}^{�}

µ_{p }�^{�}_{� }�_{�}��_{��}� �_{��}��_{����}�� �_{�� }�� ^{−}

�_{� }µ_{n }�^{�}_{� }�_{�}(�_{�� }��_{�� })^{� }�_{���}

�_{� }�^{�}_{� }�_{�}(� ^{−}

_{��}� �_{��}��_{����}�� �_{�� }�)^{�}

�

_{� }µ_{n }�^{�}_{� }�_{�}(�_{�� }��_{�� })�_{��� }�_{����}

�_{� }�^{�}_{� }�_{�}(�_{��}� �_{��}��_{����}�� �_{�� }�)^{�}

eq.4.24

v_{sens }and v_{ref }are the sensing and reference oscillator AC voltages, respectively

V_{dc }is the DC level of the oscillator signal.

µ is the transistor mobility.

It can be seen from the last term that the v_{sens }and v_{ref }are multiplied so mixing

is achieved (Liu et al., 2006).

Placing a low-pass filter composed of two RC sections will filter all unwanted

signals such as harmonics and harmonic signals of the multiplier. The mixer

difference frequency is expected to be less than 2.5MHz so the filter cut-off

frequency f_{cut-off }is set to 2.8MHz. Choosing the resistance R equals to 12kΩ, the

filter capacitance 퐶 =

�

�� � �_{�������}

= 4.7푝퐹.

So the final mixer schematic is shown in figure 4-12.

Figure 4- 12 Mixer schematics