Document Text (Pages 101-110) Back to Document

Integrated Circuit Interface for SAW Biosensors Applications

by Aggour, Khaled, MS


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Chapter 5: Simulation results of the SAW interfacing circuit 88

Figure 5- 23 Temperature control voltage calculation

The Digital to Analogue Converter (DAC) converts the value to an analogue
control voltage feeding the transistor to raise the temperature from 25.4°C to 27.3°C.

The step size of the temperature control is 0.1°C over the range of 20°C to
50°C. The default heater resistance is set to 25Ω. The actual manufactured resistance
can be entered manually in the calibration mode with the maximum allowed value of
30Ω. If the resistance exceeds this value, the control circuit will be able to control
the temperature over a limited range.

5.8 Conclusion

In this chapter, the simulation results for the interface circuit blocks have been
presented. The oscillator transient and frequency response were illustrated. It was
shown that the oscillator processes a DC component of about 3V and the
fundamental frequency is 14dB higher than the largest harmonic. The oscillator
circuit added capacitance was found to be 2.2aF. Mixer simulation shows 10 dB
between the desired frequency and its first harmonic. The square wave output from
the conversion circuit was shown. Square wave conversion to digital output
simulation using 16-bit counter was presented. The temperature effect on the SAW


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Chapter 5: Simulation results of the SAW interfacing circuit 89

oscillator was simulated and the oscillator TCF was found to be -30ppm. The mixer
simulation against temperature shows a constant difference frequency versus
temperature over the range from 20°C to 50°C. The additional temperature control
circuit was simulated indicating the calibration process and the asynchronous reset.
The simulated temperature control logic is presented and the calculation of the
temperature controlling voltage is shown.

5.9 Reference

1. Chaize, A., 2008. SAW micro-sensor design for biosynthetic infochemical
communication. MSc thesis (Advisor Cole, M.). University of Neuchatel,
Switzerland, University of Warwick, UK.


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Chapter 6: Conclusion and Further Work 90

Chapter 6

Conclusions and Further Work

6.1 Objectives Revision

The main objective of the thesis was to design a mixed signal integrated circuit to
interface the SAW biosensor developed in Chaize (2008) to a digital FPGA or
micro-controller interface. In addition, minimising the temperature effect of the
biosensor was required.

A CMOS integrated circuit for lithium tantalate SAW resonator biosensor
interfacing was designed, simulated, and laid out in CMOS 0.6µm technology. The
interface circuit with the SAW sensors build a smart biological sensing system. An
accurate circuit modelling of the two-port SAW resonator was designed based on the
model developed by Nordin et al. (2007). The model is generic and takes into
account the temperature dependence of the device and the stimulus. It can be used in
further work. The temperature compensation effect was eliminated using two
oscillators and a mixer. Further temperature control of the SAW chip was designed
and simulated.

The SAW resonator was modelled as a RLC circuit with an ideal transformer.
The simulated performance of the model gives a very good approximation to the
available commercial sensors attenuation and quality factor measurements.

For the oscillator circuit, several topologies were examined. A feedback Pierce
Oscillator topology was tested to be the optimum for this particular application.
Several amplifier designs for the oscillator were explored and the inverting current


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Chapter 6: Conclusion and Further Work 91

source amplifier was used in the design. The designed mixer is an active unbalanced
mixer and the digital part was designed in VHDL programming.

The temperature control mechanism was simulated in digital form. The logic
behaviour was simulated and the concept has been proved. The logic algorithm is
flexible and can be used to control the temperature to an arbitrary temperature
depending on the application.

6.2 Achievements

6.2.1 SAW Modelling

The electrical circuit model of the SAW resonator is a series resonant circuit with
two parallel IDT capacitances. The IDT capacitances values were calculated using
the SAW resonator technical specifications and the substrate material (lithium
tantalate) properties. The series resonant capacitance was calculated using SAW
specifications along with its array reflectivity. The series (motional) inductance was
calculated based on the resonator frequency and the SAW quality factor determines
the resistance. The model can be applied to the same substrate based SAWs at
different frequencies. The model provided 12 dB losses at the resonance frequency.
The temperature effect was included in the SAW model in the motional capacitance.
A generic formula in chapter 5 (equation 5.9) was derived to include the temperature
effect in the motional capacitance temperature coefficient.

6.2.2 Interfacing Circuit

The designed oscillator fundamental output is more than 12 dB higher than the first
harmonic. The most challenging aspect of the oscillator design was the trade-off
between the gain and bandwidth limitations. The limitation is caused by the
component parasitics in the available 0.6µm CMOS technology. Calculations and
several simulations were performed to achieve the best compromise of the amplifier
transistors’ dimensions and design topologies.

The largest mixer output harmonic is more than 10 dB below the desired
signal. The harmonic is completely suppressed after conversion to square wave. A
simplification was done in the circuit by utilising the oscillator output DC level as a
DC biasing for the mixer’s MOSFET’s gates. The mixer DC power consumption is
negligible.

Frequency to digital conversion is done by a digital logic implemented in
VHDL. The resolution of the Integrated Circuit interface is 100Hz output in a 16-bit
counter capable of measuring a frequency difference up to 6.5335 MHz which is


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Chapter 6: Conclusion and Further Work 92

higher than the required range. The digital circuit is capable of measuring higher
resolution by increasing the counting period. Prototypes were designed as clock
divisors and can be easily adapted to achieve other clock frequencies using the
available clock generation cells.

6.2.3 Temperature Effect

The temperature effect on the SAW was analysed in detail. The TCF of the substrate
material was examined and modelled in the SAW electrical model. The oscillator
amplifiers, phase shifter and buffer sensitivity to temperature affect the oscillator
output frequency. The whole circuit behaviour with temperature was simulated and
shows the additional variation of oscillator frequency due to components’ variation
with temperature. The oscillator frequency change with temperature was linear with
a negative slope.

Temperature effect was eliminated by using the mixer. The simulated mixer
performance shows that each oscillator frequency variation due to temperature
cancels each other. The simulation of the circuit square wave confirms the
elimination of the temperature effect introduced by the SAW and the circuit
components.

Thorough experiments were performed to test the SAW devices temperature
behaviour. The SAWs were measured in a temperature range between 20°C to 50°C.
The experiments show a linear temperature coefficient of SAW heater resistance
with a value of 6 × 10-3°C-1. The control of the SAW temperature by changing the
heater power was experimentally done. A formula was deduced to indicate the
temperature-controlling power relationship based on the carried out experiments.
This formula can be used for further SAW devices utilising the same substrate
material.

An additional temperature control mechanism was produced in the same chip
without either external micro-controller or an off-chip component. The mechanism
utilises the SAW integrated gold heater to measure the temperature and feeds back
an appropriate voltage to the gate of a controlling transistor to control the power
delivered to the heater and accordingly the SAW chip temperature. The design
measures the temperature by using the heater resistance. The control logic makes use
of the experimental results for the heater temperature coefficient and the powertemperature
constants for the device. An interesting advantage of the design is its
capability to give the user the option to enter manually the required heater resistance
and temperature over a wide range (20°C to 50°C).The design can control heaters
with resistance up to 30Ω in this range. Increasing heater resistance beyond this
range will limit the temperature control available range.


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Chapter 6: Conclusion and Further Work 93

The design is flexible and can be adapted to other sensors by changing the
previous parameters. The control logic functionality was simulated using ALDEC
Active-HDL software in digital domain. The logic input is the ADC and its output is
the DAC of the controlling voltage.

6.3 Specifications

The interface circuit consumes a total of 55mW when powered by 5V supply. The
total chip area is 4.5mm
2. A summary of the chip specification is shown in table 6-1.
The 0.6µm CMOS process development cost is about €350 per mm
2. The mass
production cost is about €1 per mm
2.

Technology

Manufacturer

Process

CMOS

XFAB

XC06 (0.6µm)

Estimated chip development cost 1600

Estimated chip cost for mass production 5

Analogue Supply Voltage (VDDA)

Digital Supply Voltage (VDD)

VSS

Maximum flowing current

Power consumption

Area

Frequency resolution

Output format

5 V

5 V

0 V

1.2 mA

55 mW

2.5mm x 1.8mm

100 Hz

Binary 16-bit

Table 6-1 Chip specifications

6.4 Further Work

The next step forward is to make the CMOS chip and integrate it with SAW device
into a single chip. This can be accomplished by using post CMOS processing masks
to build the SAW resonator. A possible implementation can be realized using


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Chapter 6: Conclusion and Further Work 94

Aluminium Nitride (AlN) or Zinc Oxide (ZnO) as substrates deposited on top of the
IDT material. Building a smart sensing system chip will have many advantages such
as more efficient temperature control of the SAW, reduced fabrications cost and
lower circuit complexity. A possible layout section is shown in figure 6-1.

More advanced fabrication processes such as 0.18µm will allow the transistors
areas reduction by at least ten times. The active elements occupies about half the
chip area. A considerable cost reduction will be gained. Also it will allow the
realization of higher SAW frequency oscillators up to the GHz range. Moreover, an
oscillation can be reached for high attenuation SAW devices (more than 15 dB
losses). The mixer circuit can be improved also if the technology used can handle
integrated inductors. Using a lower supply voltage decreases the power consumption
and consequently the heating of the chip.

Figure 6- 1 A possible layout of integrated CMOS implementation for SAW and interface circuit

The interface circuit is suitable for SH-SAW for liquid sensing. The work can
be extended to include high frequencies Rayleigh SAW or BAW for gas sensing
applications. One port SAW can be interfaced using the same circuit with one stage
amplifier instead of two.

The temperature control circuit logic was made for simulation purpose as a
proof of concept and the code is not synthesizable. The control logic was has not
been laid out. The mixed signal simulation of the temperature control circuit has not
been performed. The temperature control circuit can be improved by using a higher
resolution ADC to measure the voltages. The current analogue to digital converter is
10-bit successive approximation ADC which causes a considerable error in the
voltage conversion to digital. Implementing a 20-bit sigma-delta analogue to digital
converter will improve the temperature measurement accuracy. Moreover, the
control logic algorithm can be enhanced. The temperature control logic can be
modified to realize the temperature control of any sensor type with integrated
resistive heaters.


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Chapter 6: Conclusion and Further Work 95

6.5 References

1. Chaize, A., 2008. SAW micro-sensor design for biosynthetic infochemical
communication. MSc thesis (Advisor Cole, M.). University of Neuchatel,
Switzerland, University of Warwick, UK.
2. Nordin, A. N., Zaghloul, M. E., 2007. Modeling and Fabrication of CMOS

Surface Acoustic Wave Resonators. IEEE Transactions on Microwave
Theory and Techniques, vol. 55, no. 5, pp. 992-1001.


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APPENDIX A: XFAB XC06 Process and Analogue Cells specifications 96

APPENDIX A

XFAB XC06 Process and Analogue Cells
specifications

A.1 Basic Design Rules

Basic Design Rules
Mask Width (µm) Spacing (µm)

Standard N-well 4 4.8
HV deep N-well 6 15
Isolated P-well 6 5
Active Area 0.6 1.2
Poly-Silicon Gate 0.6 0.8
Contact 0.6 0.6
Metal 1 0.9 0.8
Via 1 0.7 0.6
Metal 2 0.9 0.8
Via 2 0.7 0.6
Metal 3 1.2 1
ViaL 0.7 0.7
METL 2.5 2.5


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APPENDIX A: XFAB XC06 Process and Analogue Cells specifications 97

A.2 Device Parameters

A2.1 MOS Transistors

NMOS PMOS
Parameter Symbol Typical Symbol Typical Unit
threshold voltage
narrow channel VT0810N 1.08 VT0810P -1.1 V

0.8x10
threshold voltage
small channel VT0806N 1 VT0806P -1.05 V

0.8x0.6
threshold voltage
temperature TCVTN -1.4 TCVTP -1.6 mV/K

coefficient
body factor long
channel 10x10 GAMMAN 0.85 GAMMAP 0.34 V1/2

gain factor KPN 117 KPP 40 µA / V2
effective substrate
doping NSUBN 166 NSUBP 27 1015/Cm3

effective mobility UON 424 UOP 145 cm²/ Vs
mobility exponent BEXN -1.8 BEXP -1.4 dec/ V
Sub-threshold slope SWING06N 11 SWING06P 11 -
Sub-threshold
leakage SLEAK06N 0.001 SLEAK06P 0.001 pA/ µm

A2.2 Sheet Resistances

Parameter Symbol Typical Unit
POLY0- sheet resistance RGATEN 580 Ω /
POLY1-NDIFF gate sheet
resistance RGATEN 17 Ω /

POLY1-PDIFF gate sheet
resistance RGATEP 17 Ω /

POLY1-NDIFF gate
effective width 0.6 µm WGATEN 0.64 µm

POLY1-PDIFF gate
effective width 0.6 µm WGATEP 0.76 µm

metal1 effective width 0.9
µm WMET 0.9 µm

metal2 effective width 0.9
µm WMET2 0.9 µm

N-well temperature
coefficient TCNWELL 68 10-3/K

N+ temperature
coefficient TCDIFFN 1.5 10-3/K

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