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DESIGN OF A PIXEL SCALE OPTICAL SAMPLE-AND-HOLD CIRCUIT SUITABLE FOR INTEGRATION IN MULTI-TECHNOLOGY FPGA

by SHARMA, ROOPALI

Abstract (Summary)
A novel Optical Sample-and-hold Circuit is designed with the ability to be integrated with the multi-technology FPGA (MT-FPGA) which opens a new era for multi-technology applications to use flexibility and reusability benefits associated with conventional FPGAs. Various Multi-technology devices can be implemented using MT-FPGA with the benefits to reprogram and reconfigure. This paper describes the incorporation of a Pixel Scale Optical Sample and Hold circuit in the new MT-FPGA architecture as a multi-technology block (MTB) to underline the multi-technology field programmable ability of this architecture. The MTB is designed for implementation using 0.25 deep submicron technology and consists of a p-diffusion to n-well photo-detector followed by a sampling circuit and a buffer amplifier. The sampling rate of the MTB can be adjusted for different range of optical powers level thus giving the facility to represent wide range of optical power within the 2.5V, dynamic range of circuit output.
Bibliographical Information:

Advisor:

School:University of Cincinnati

School Location:USA - Ohio

Source Type:Master's Thesis

Keywords:photodetector sample and hold circuit multi technology devices

ISBN:

Date of Publication:01/01/2006

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