Compact high performance analog CMOS baseband design solutions for multistandard wireless transceivers
In this dissertation, a novel compact wireless radio transceiver architecture reusing a baseband chain so as to significantly reduce the die area is proposed. The proposed architecture employs a direct conversion architecture with a shared baseband chain and is suitable for wireless standards based on time-division duplexing air interface. In direct conversion architectures, baseband channel selection filters and variable gain amplifiers are placed in the receive path as well as in the transmit path. Here, it is proposed to use the same baseband filters and variable gain amplifiers in both the receive path and the transmit path to reduce the die area. To realize a high performance direct conversion receiver for multistandard wireless communications, the limiting factors in the direct conversion receiver should be identified and removed. In this dissertation, among many problems in direct conversion receivers, the DC offset problem is addressed. The origins of the DC offset are summarized, and three self-mixing mechanisms generating the DC offset are modeled to understand how the static and dynamic DC offsets are produced from the mechanisms. A DC offset cancellation scheme consisting of a static DC offset canceller and a dynamic DC offset canceller is proposed. For the static DC offset canceller, a DC feedback loop is proposed to use and verified through simulation, fabrication, and measurement. A novel dynamic DC offset canceller utilizing an adaptive filtering technique is also proposed and verified through simulation. An analog baseband chain for the proposed compact wireless transceiver is designed in this dissertation. A fully balanced differential difference amplifier is designed as a core amplifier to be used in both a baseband filter and a variable gain amplifier. A fully differential Sallen-Key channel selection filter and a fully differential variable gain amplifier using attenuators which can be shared for both the transmit path and the receive path are designed. A DC feedback loop is designed to cancel the static DC offset. This baseband chain is realized in a 0.5 um standard CMOS process and verified through simulation, fabrication, and measurement.
School:The Ohio State University
School Location:USA - Ohio
Source Type:Master's Thesis
Keywords:cmos analog baseband wireless transceiver direct conversion receiver
Date of Publication:01/01/2006