AUTOMATIC HIGH-LEVEL MODEL GENERATION FOR ANALOG RF CIRCUITS IN VHDL-AMS

by YANG, WEI

With the booming market of wireless communications, complex wireless System-On-Chips(SoCs) challenge the traditional bottom-up design methodology for the analog part of these complex mixed-signal SoCs. The combination of top-down and bottom-up scenarios of design and verification methodology, new modeling language and simulation environment, and high-level models of components in the RF system provides a potential solution. Effective high-level models of analog RF blocks are an essential mechanism for supporting top-down design methodology of the complex communication SoCs. High-level models of analog RF circuits allow the evaluation of the system architecture and performance at an early stage of development. Further, the combination of traditional circuit elements and high-level models provide a good trade-off between simulation time and accuracy, thus potentially shortening the design time. This thesis investigates an approach for automatically generating high-level models for analog RF blocks in VHDL-AMS with desired performance characteristics. To demonstrate the approach, high-level models of two types of RF circuits, analog filters and Low Noise Amplifiers (LNAs), are created in VHDL-AMS. The performance characteristics of high-level models are validated by a VHDL-AMS simulator and SPICE.